The present invention relates to a method of operating a non-volatile memory device and, more particularly, to a method of operating a non-volatile memory device, which can improve the performance by increasing the verify lines of a page buffer.
Semiconductor memory devices can be classified into random access memory (RAM) and non-volatile memory. RAM is volatile since data stored therein is lost as time goes by and has a rapid input and output of data. Example RAM devices include dynamic random access memory (DRAM) and static random access memory (SRAM). Non-volatile memory can retain data after the data is input.
There is an increasing demand for flash memory to/from which data can be input/output electrically. Flash memory is a device that can be electrically erased at high speed in the state in which circuits are not removed from a board. Flash memory has a simple memory cell structure, and is therefore advantageous in that the production prime cost per unit memory is cheap, and it does not require a refresh function for retaining data.
Flash memory is largely classified into a NOR type and a NAND type. NOR type flash memory requires one contact per two cells, and is disadvantageous in high integration, but is advantageous in high speed due to a high cell current. NAND type flash memory is disadvantageous in high speed due to a low cell current, but is advantageous in high integration since a plurality of contacts shares one contact. Accordingly, the NAND flash memory device has become popular as next-generation memory device, such as those used with MP3 players, digital cameras, mobile devices and auxiliary storage devices.
In recent years, in order to further improve the high integration of flash memory, active research has been done on a multi-bit cell that is able to store a plurality of data bits in one memory cell. This type of memory cell is generally called a multi-level cell (MLC). A memory cell for storing a single data bit is called a single level cell (SLC).
The MLC has been developed to store 4-bit or 8-bit data information from the storage of 2-bit data information. Distributions of the threshold voltage of the flash memory device are subdivided as the number of bits which can be stored increases. As the width of threshold voltage distributions narrows, performance improves. To this end, a method of performing program verification is important. When more verification is performed by setting many verify voltages, the width of the threshold voltage distributions is narrowed.
However, if many verify voltages are set, the number of latch circuits of a page buffer which perform the verify operation is increased. Accordingly, there is a limit to the increase of the verify voltages.